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Photovoltaics: TWP
Photovoltaics: TWP
PV-TWP (Technology Work Package) Development of Silicon heterojunction cell on Thin wafer
PV-TWP (Technology Work Package) Development of Silicon heterojunction cell on Thin wafer
Falling price has led to the widespread use of wafer-based PV modules and price attaining grid parity. Moreover, PERC and TOPCon type cells are increasing their footprint, replacing traditional BSF type cells. However, a high power generating module in Indian hot condition is needed, especially to meet the demand of rooftop applications. In that context, we are developing, in this project, silicon heterojunction (SHJ) type solar cells, which will have lower heat-related power loss in the Indian field condition. BHEL Gurgaon, our industrial partner has already installed and made operational an in-line silicon PECVD SHJ fabrication tool. This is a technology-driven project to fabricate at BHEL industrial size wafer cells of cutting edge technology developed at IITM.
Objective:
Objective:
Develop state of the art silicon heterojunction (SHJ cell) on a thin wafer, a Pilot line at BHEL, Gurgaon will directly benefit from the knowledge transfer.
Domain Team
Domain Team
Dr. Jatin Rath, Domain coordinator, Physics, IITM
Dr. M. S. Ramachandra Rao, Physics, IITM
Dr. Sathyan Subbiah, ME, IITM
Dr. Sivarama Krishnan, Physics, IITM
Projects
Projects
Thin wafering technology:
Thinning of the wafer is another direction to not only save material cost but also improve some of the electrical parameters, e.g. open-circuit voltage. To that end, in the subproject, in-house thin wafering technology for defect-free polished and unpolished Si wafers of preferred orientation will be developed.
Light Trapping:
Thin wafer needs excellent light trapping schemes to generate a high current. Custom made and simulation predicted light-trapping features and surface textures though fast laser scribing and chemical methods will be developed. A femto-second laser facility at IITM will be employed for this purpose.
Next-generation SHJ cell design:
The novel tunnel oxide passivation, non-silicon electron transport layer (ETL) and hole transport layer (HTL) and high mobility TCO are some of the areas which will improve carrier collection and increase the window of process parameter space. This subproject will develop a wide variety of these layers and SHJ cell with employing new type (tunnel) oxide and ETL/HTL layers will be developed.
Thin wafer solar cell fabrication:
Technology will be developed to fabricate stress and warp-free solar cells of (in house) thin wafer with near symmetric cell design. A high voltage SHJ cell (Voc ≥ 0.7eV) is aimed at.
Technology transfer:
Batch type to in-line process parameter conversion will be estimated and the process technology transferred to in-line tool of BHEL. The in-line SHJ fabrication tool at BHEL will be upgraded to speed up the throughput and improve the homogeneity of PECVD deposition
State of the art SHJ cell:
We are aiming to achieve >19% in short term and >21 % efficiency on industrial-sized wafer silicon heterojunction solar cells during this project.
DSEHC office
DSEHC office
Room No. 111
Material Science Research Center (MSRC)
Indian Institute of Technology Madras
Chennai – 600036
+91-44-22575913
DST IIT Solar Energy Harnessing Centre
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